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Tuesday, 28 April 2015

Computers as Components- Model question paper for B.E/B.Tech Engineering



1(a) Draw a state diagram for a behaviour that sends the command bits on the track. The machine should generate the address, generate the correct message type, include the parameters and generate the ECC. (6 Marks)
(b) Briefly describe the distinction between specification and architecture. (4 Marks)
(c) What is the difference between the Harvard and von-Neumann architectures? (4 Marks)
(d) Write a program that uses a circular buffer to perform FIR filtering. (6 Marks)
2(a) Draw a UML sequence diagram that shows how an ARM processor goes into supervisor mode. The diagram should include the supervisor mode program and the user mode program. (8 Marks)
(b) Write ARM code that tests a register at location ds 1 and continues execution only when the register is nonzero. (4 Marks)
(c) What is the difference between latency and throughput? (4 Marks)
(d) If we want an average memory access time of 6.5 ns, our cache access time is 5ns, and our main memory access time is 80 ns, what cache hit rate must we achieve? (4 Marks)
3(a) Draw a UML sequence diagram showing a write operation with wait states across a bus bridge. (8 Marks)
(b) What happens when an interrupt handler executes for too long and the next interrupt occurs before the last call to the handler has finished? (4 Marks)
(c) If you have a choice among several DRAMs of the same capacity but with different data widths, when would you want to use a narrowpower memory? When would you want to use a taller memory? (4 Marks)
(d) What is a logic analyzer? (4 Marks)
4(a) Assume you want to use random tests on an FIR filter program. How would you know when the program under test is executing correctly? (4 Marks)
(b) Write a C code for a program that takes two values from an input circular buffer and puts the sum of those two values into a separate output circular buffer. (8 Marks)
(c) Explain why the person generating clear-box program tests should not be the person who wrote the code being tested. (4 Marks)
(d) What is Frequency-shift keying? Explain. (4 Marks)
5(a) Distinguish between Round-robin scheduling and Cyclostatic scheduling. (4 Marks)
(b) How would you use the ADPCM method to encode an unvarying (DC) signal with the coding alphabet {-3, -2, -1, 1, 2, 3}? (4 Marks)
(c) What factors provide a lower bound on the period at which the system timer interrupts for preemptive context switching? (4 Marks)
(d) Draw a UML class diagram for a process in an operating system. The process class should include the necessary attributes and behaviours required of a typical process. (8 Marks)
6(a) You are designing an embedded system using an Intel Xeon as a host. Does it make sense to add an accelerator to implement the function z=ax+by+c? Explain. (4 Marks)
(b) Determine how much logic in an FPGA must be devoted to a PCI bus interface and how much would be left for an accelerator core. (8 Marks)
(c) Draw and explain the sequence diagram and object diagram for the video accelerator. (8 Marks)
7(a) Give an example of a simple protocol that would allow sensor nodes in a sensor network to determine the other nodes with which they can communicate. (4 Marks)
(b) Explain the seven layers of OSI model. (8 Marks)
(c) Explain how I2C Bus can be used to link microcontrollers into systems. (4 Marks)
(d) What is the longest time that a processing element may have to wait between two successive data transmissions on a round-robin arbitrated bus? Assume that each data transmission requires one time unit. (4 Marks)
8(a) Differentiate between waterfall model, spiral model and successive refinement model of system design techniques. (6 Marks)
(b) what is CRC card methodology? Explain the steps to follow while using this methodology to analyze a system. (6 Marks)
(c)What skills might be useful in a cross-functional team that is responsible for designing a set-top box? (4 Marks)
(d) Estimate the cost of finding and fixing a single software bug. (4 Marks)

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